From 9c332ac3e74bdda12289b8141a5b74c2250cc1e3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Borna=20Rajkovi=C4=87?= Date: Mon, 27 Jun 2022 11:44:19 +0200 Subject: [PATCH] Updated minimum model --- examples/arm/minimum.system | 67 +++++++++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 examples/arm/minimum.system diff --git a/examples/arm/minimum.system b/examples/arm/minimum.system new file mode 100644 index 0000000..d74bc48 --- /dev/null +++ b/examples/arm/minimum.system @@ -0,0 +1,67 @@ + +// Version 0.0.1 +set load_performs_init; + +#include ".\arm7tdmi.comdel" +#include ".\decoder.comdel" +#include ".\memory.comdel" + + + +component System +{ + clock 100 MHz; + //ahb + wire<32> addr; + wire<32> rdata; + wire<32> wdata; + wire<3> size; + wire write; + wired_or ready; + wired_or irq; + wired_or fiq; + wired_and nmreq; + wire --sel_mem; + wire sel_bridge; + wire sel_dmac; + wire --ahb__sel_mem; + wire ahb__sel_bridge; + wire ahb__sel_dmac; + wire busreq = 0; + wire grant; + + + // components -------------------------------------------- + subcomponent Memory64KiB memorija(addr, rdata, wdata, size, write, ready, sel_mem); + subcomponent ARM7tdmi arm(addr, rdata, wdata, size, write, ready, irq, fiq, nmreq, busreq, grant) uses memorija; + subcomponent Decoder decoder(addr, nmreq, sel_mem, sel_bridge, sel_dmac, 1, 1); + + display { + component { x: 1179; y: 326; ref: "arm"; } + component { x: 1148; y: 521; ref: "memorija"; } + component { x: 1070; y: 381; ref: "decoder"; } + + // ahb bus + + rectangle { + x: 1027; y: 465; + width: 249; height: 20; + fill_color: #999999; + line_color: #999999; + } + + + path { + x:0; y:0; + points: ((1153, 521),(-1,-46)); + } + path { + x:0; y:0; + points: ((1234, 457),(-82,18)); + } + path { + x:0; y:0; + points: ((1090, 421),(62,54)); + } + } +} \ No newline at end of file