Borna Rajković 3172d7e4cf Added component/bus deletion and rename		2022-06-02 01:37:14 +02:00
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comdel.system	Updated component and bus generation logic + bugfixes	2022-05-31 01:05:08 +02:00
frisc_library.csl	Updated component and bus generation logic + bugfixes	2022-05-31 01:05:08 +02:00
schema.csl	Added count and pin validators	2022-05-20 00:44:40 +02:00
schema2.csl	Added component/bus deletion and rename	2022-06-02 01:37:14 +02:00
schema3.csl	Added component/bus deletion and rename	2022-06-02 01:37:14 +02:00