15 Commits

Include renames

Author	SHA1	Message	Date
Borna Rajković	f93a2afa63	Updated component and bus generation logic + bugfixes	2022-05-31 01:05:08 +02:00
Borna Rajković	86b8861533	Extracted schema and library management to Application	2022-05-30 23:11:06 +02:00
Borna Rajković	0c4afe87d9	Basic refactor	2022-05-27 08:18:17 +02:00
Borna Rajković	aac972c6ca	Updated bus rendering	2022-05-26 19:22:10 +02:00
Borna Rajković	5cf8235608	Added connection generation	2022-05-25 07:39:45 +02:00
Borna Rajković	0a658a4aba	Added count and pin validators	2022-05-20 00:44:40 +02:00
Borna Rajković	e2e0506041	Added support for @componentHeader	2022-05-16 01:02:34 +02:00
Borna Rajković	59b19062ff	Added support for memory attribute	2022-05-15 23:55:03 +02:00
Borna Rajković	65020c2b7f	Updated name dialog	2022-05-15 17:00:20 +02:00
Borna Rajković	23764776f1	Updated attribute dialog	2022-05-15 16:13:29 +02:00
Borna Rajković	45a668fc46	Added comdel system generation ... // todo display generation	2022-05-09 00:51:47 +02:00
Borna Rajković	fb8aafb2a9	Updated support for single automatic bus	2022-05-08 14:50:56 +02:00
Borna Rajković	9ff6633777	Removed @wire from schema	2022-05-07 18:28:31 +02:00
Borna Rajkovic	d6c1023df2	Refactored state	2022-04-24 22:21:45 +02:00
Borna Rajković	bf029929a7	Added examples and documentation	2022-04-13 00:25:21 +02:00